Zishen Wan  

I am a third-year Ph.D. student at Georgia Tech, advised by Prof. Arijit Raychowdhury at Integrated Circuits and Systems Research Lab. I have general research interests in computer architecture and VLSI, with a focus on designing efficient and reliable hardware systems for autonomous machines and AI.

Before coming to Georgia Tech, I received my M.S. in Electrical Engineering from Harvard University in 2020. During my master, I was fortunate to be advised by Prof. Vijay Janapa Reddi at Edge Computing Lab, and collaborated with Prof. David Brooks and Prof. Gu-Yeon Wei at VLSI-Arch Lab.

I received my B.Eng. in Electrical Engineering from Harbin Institute of Technology in 2018. During my undergrad, I was fortunate to work with Prof. Dianguo Xu and Prof. Xueguang Zhang.

I was a cross-registered student at MIT from 2018 to 2020, and a visiting student at National Chiao-Tung University and National Tsing-Hua University in 2017.

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                  Email:
                  zishenwan@gatech.edu
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Research Interests

My research is at the intersection of VLSI, computer architecture, and edge intelligence. I build hardware and system for autonomous machines and edge computing, with the vision to advance their performance, efficiency, resilience, and robustness.
Book
Robotic Computing on FPGAs
Shaoshan Liu, Zishen Wan, Bo Yu, Yu Wang
Editor: Natalie Enright Jerger
Synthesis Lectures on Computer Architecture (Morgan & Claypool Publishers), pp.1-218, Jun 2021
Book / Bibtex

This book provides a thorough overview of the state-of-the-art FPGA-based robotic computing accelerator designs and summarizes their adopted optimized techniques. This book consists of ten chapters, delving into the details of how FPGAs have been utilized in robotic perception, localization, planning, and multi-robot collaboration tasks. In addition to individual robotic tasks, this book provides detailed descriptions of how FPGAs have been used in robotic products, including commercial autonomous vehicles and space exploration robots. Some key observations of this book has been published as a survey paper in IEEE Circuits and Systems Magazine, 2021.

Publications       (*: Equal Contributions)
Analyzing and Improving Resilience and Robustness of Autonomous Machines
Zishen Wan, Karthik Swaminathan, Pin-Yu Chen, Nandhini Chandramoorthy, Arijit Raychowdhury
IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2022
Paper (To appear)

We explore the various originations of fault sources across the computing stack of autonomous systems, and discuss the diverse fault impacts and fault mitigation techniques of different scales of autonomous systems.

Automatic Domain-Specific SoC Design for Autonomous Unmanned Aerial Vehicles
Srivatsan Krishnan, Zishen Wan, Kshitij Bhardwaj, Paul Whatmough, Aleksandra Faust, Sabrina M. Neuman, Gu-Yeon Wei, David Brooks, Vijay Janapa Reddi
IEEE/ACM International Symposium on Microarchitecture (MICRO), 2022
Paper / arXiv / Bibtex

We propose a machine learning-based design space exploration framework, Autopilot, that can automate the full system cyber-physical co-design for aerial robots. AutoPilot consistently outperforms general-purpose processors and specialized accelerators built for drones.

Improving Compute In-Memory ECC Reliability with Successive Correction
Brian Crafton, Zishen Wan, Samuel Spetalnick, Jong-Hyeok Yoon, Wei Wu, Carlos Tokunaga, Vivek De, Arijit Raychowdhury
ACM/IEEE Design Automation Conference (DAC), 2022
Paper / Video / Bibtex

We propose a new ECC scheme for hard and soft errors in foundry RRAM-based Compute-In-Memory chip. We demonstrate single, double, and triple error correction offering up to 16,000× reduction in bit error rate, while consuming only 29.1% area and 26.3% power overhead.

Robotic Computing on FPGAs: Current Progress, Research Challenges, and Opportunities
Zishen Wan, Ashwin Lele, Bo Yu, Shaoshan Liu, Yu Wang, Vijay Janapa Reddi, Cong (Callie) Hao, Arijit Raychowdhury
IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2022
Paper / Slides / Video / Bibtex

We present the cross-layer robotic computing stack, illustrate the current progress and key design techniques. We summarize and highlight the challenges, research opportunities, and roadmap for the next-generation FPGA-based robotic computing systems.

An Energy-Efficient and Runtime-Reconfigurable FPGA-Based Accelerator for Robotic Localization Systems
Qiang Liu*, Zishen Wan*, Bo Yu*, Weizhuang Liu, Shaoshan Liu, Arijit Raychowdhury
IEEE Custom Integrated Circuits Conference (CICC), 2022
Paper / Slides / Bibtex

We present an energy-efficient and runtime-reconfigurable FPGA-based accelerator for robotic localization tasks. We exploit SLAM-specific data locality, sparsity, reuse, and parallelism, and achieve >5x performance improvement over state-of-the-art.

Roofline Model for UAVs: A Bottleneck Analysis Tool for Onboard Compute Characterization of Autonomous Unmanned Aerial Vehicles
Srivatsan Krishnan, Zishen Wan, Kshitij Bhardwaj, Ninad Jadhav, Aleksandra Faust, Vijay Janapa Reddi
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2022
Paper / Skyline Tool / Bibtex

We present a bottleneck analysis tool, Skyline, for designing compute systems for autonomous Unmanned Aerial Vehicles (UAV). The tool provides insights by exploiting the fundamental relationships between various components in the autonomous UAV such as sensor, compute, body dynamics.

FRL-FI: Transient Fault Analysis for Federated Reinforcement Learning-Based Navigation Systems
Zishen Wan, Aqeel Anwar, Abdulrahman Mahmoud, Tianyu Jia, Yu-Shun Hsiao, Vijay Janapa Reddi, Arijit Raychowdhury
Design, Automation and Test in Europe Conference (DATE), 2022
Paper / Slides / Bibtex

We characterize the hardware transient fault impact on federated reinforcement learning system, a swarm intelligence paradigm in autonomous machines. We further propose application-aware cost-effective fault detection and mitigation scheme to enable autonomy reliability.

Circuit and System Technologies for Energy-Efficient Edge Robotics
Zishen Wan, Ashwin Lele, Arijit Raychowdhury
Asia and South Pacific Design Automation Conference (ASP-DAC), 2022 (Invited Paper)
Paper / Slides / Bibtex

We present a series of ultra-low-power accelerator and system designs on enabling the intelligence in edge robotic platforms, with an emphasis on mixed-signal circuit, neuro-inspired computing, benchmarking, software infrastructure, and algorithm-hardware co-design.

(Gif source: Google)
QuaRL: Quantization for Fast and Environmentally Sustainable Reinforcement Learning
Srivatsan Krishnan*, Max Lam*, Sharad Chitlangian*, Zishen Wan, Gabriel Barth-Maron, Aleksandra Faust, Vijay Janapa Reddi
Transactions on Machine Learning Research (TMLR), 2022
Paper / Google AI Blog

We propose a quantized distributed reinforcement learning (RL) training system, and enable more environmentally friendly RL by achieving carbon emission improvements between 1.9 × and 3.76× compared to training RL-agents in full-precision.

Analyzing and Improving Fault Tolerance of Learning-Based Navigation System
Zishen Wan, Aqeel Anwar, Yu-Shun Hsiao, Tianyu Jia, Vijay Janapa Reddi, Arijit Raychowdhury
ACM/IEEE Design Automation Conference (DAC), 2021
Paper / Slides / Video / Bibtex

We evaluate the resilience of learning-based navigation systems to transient and permanent hardware faults. We further propose two efficient fault mitigation techniques for both RL training and inference.

MAVFI: An End-to-End Fault Analysis Framework with Anomaly Detection and Recovery for Micro Aerial Vehicles
Yu-Shun Hsiao*, Zishen Wan*, Tianyu Jia, Radhika Ghosal, Arijit Raychowdhury, David Brooks, Gu-Yeon Wei, Vijay Janapa Reddi (*alphabetical order)
Pre-print, 2021
Paper / Slides / Code / Bibtex

We build a ROS-based end-to-end fault analysis framework to understand the resilience of Micro Aerial Vehicles (MAVs) system, and propose two low overhead anomaly-based transient fault detection and recovery schemes.

AutoSoC: Automating Algorithm-SoC Co-design for Aerial Robots
Srivatsan Krishnan, Thierry Tambe, Zishen Wan, Vijay Janapa Reddi
Pre-print, 2021
Paper / Poster / Bibtex

We present AutoSoC, a algorithms-hardware co-design framework for end-to-end learning-based aerial autonomous machines. AutoSoC runs the ASIC flow of place and route and generates layouts of the floor-planed accelerators with varying performance, area, and power consumption.

A Survey of FPGA-Based Robotic Computing
Zishen Wan*, Bo Yu*, Thomas Yuang Li, Jie Tang, Yuhao Zhu, Yu Wang, Arijit Raychowdhury, Shaoshan Liu
IEEE Circuits and Systems Magazine (CAS-M), 2021
Paper / Bibtex

We provide an overview of recent work on FPGA-based robotic accelerators. An analysis of software and hardware optimization techniques and main technical issues is presented, along with some commercial and space applications.

An Energy-Efficient Quad-Camera Visual System for Autonomous Machines on FPGA Platform
Zishen Wan*, Yuyang Zhang*, Arijit Raychowdhury, Bo Yu, Yanjun Zhang, Shaoshan Liu
IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2021
Paper / Slides / Summary Video / Long Video / Bibtex

We present a real-time and energy-efficient ORB (Oriented-Fast and Rotated-BRIEF) based visual system on FPGAs. Compared to Nvidia TX1 and Intel i7 CPU, our FPGA-based implementation achieves 5.6x and 3.4x speedup, as well as 3.0x and 34.6x power reduction, respectively.

iELAS: An ELAS-Based Energy-Efficient Accelerator for Real-Time Stereo Matching on FPGA Platform
Tian Gao*, Zishen Wan*, Yuyang Zhang, Bo Yu, Yanjun Zhang, Shaoshan Liu, Arijit Raychowdhury
IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2021
Paper / Bibtex

We present an energy-efficient hardware architecture for real-time ELAS (Efficient Large-scale Stereo) based stereo matching on FPGAs. Compared to SOTA SoC and Intel i7 CPU, our FPGA design achieves 3.32x and 38.4x speedup, and 1.13x and 27.1x power reduction, respectively.

Algorithm-Hardware Co-Design of Adaptive Floating-Point Encodings for Resilient Deep Learning Inference
Thierry Tambe, En-Yu Yang, Zishen Wan, Yuntian Deng, Vijay Janapa Reddi, Alexander Rush, David Brooks, Gu-Yeon Wei
ACM/IEEE Design Automation Conference (DAC), 2020   (Best Paper Award)
Paper / arXiv (long version) / Bibtex

We present an algorithm-hardware co-design centered around a novel floating-point inspired number format, which can achieve higher inference accuracies and lower per-operation energy compared to NVDLA-like PE.

The Sky Is Not the Limit: A Visual Performance Model for Cyber-Physical Co-Design in Autonomous Machines
Srivatsan Krishnan, Zishen Wan, Kshitij Bhardwaj, Paul Whatmough, Aleksandra Faust, Gu-Yeon Wei, David Brooks, Vijay Janapa Reddi
IEEE Computer Architecture Letters (CAL), 2020   (Best Paper Award)
Presented at International Symposium on High-Performance Computer Architecture (HPCA), 2021
Paper / Tool Website / Bibtex

We introduce a roofline-like model to understand the role of computing in aerial autonomous machines. The model provides insights by exploiting the fundamental relationships between various components in an aerial robot, such as sensor framerate, compute performance, and body dynamics.

Workshop Papers
Multi-Task Federated Reinforcement Learning with Adversaries
Aqeel Anwar, Zishen Wan, Arijit Raychowdhury
International Conference on Machine Learning (ICML) Adversarial Machine Learning Workshop, 2022
Paper

We analyze the multi-task federated reinforcement learning (MT-FedRL) algorithm with an adversarial perspective. We propose an effective adversarial attack method, and an adaptative detection and recovery scheme for MT-FedRL system.

RRAM-ECC: Improving Reliability of RRAM-Based Compute In-Memory
Zishen Wan*, Brian Crafton*, Samuel Spetalnick, Jong-Hyeok Yoon, Arijit Raychowdhury
13th Annual Non-Volatile Memories Workshop (NVMW) , 2022
Paper / Slides / Summary Video / Long Video / Bibtex

We explore the impact of device variation (calibrated with measured data on foundry RRAM arrays) and propose a new class of ECC for hard and soft errors in RRAM-based in-memory coomputing. We demonstrate the single, double, and triple error correction.

ActorQ: Quantization for Actor-Learner Distributed Reinforcement Learning
Max Lam*, Sharad Chitlangian*, Srivatsan Krishnan*, Zishen Wan, Gabriel Barth-Maron, Aleksandra Faust, Vijay Janapa Reddi
International Conference on Learning Representations (ICLR) HEAT Workshop, 2021
Paper / Poster / Code / Bibtex

We introduce a novel Reinforcement Learning training paradigm, ActorQ, to speed up actor-learner distributed RL training. ActorQ demonstrates >1.5x-2.5× speedup, and faster convergence over full precision training on a range of tasks (Deepmind Control Suite) and RL algorithms (D4PG, DQN).

Quantized Reinforcement Learning (QuaRL)
Srivatsan Krishnan*, Sharad Chitlangian*, Max Lam*, Zishen Wan, Aleksandra Faust, Vijay Janapa Reddi
Conference on Machine Learning and System (MLSys) ReCoML Workshop, 2020
Paper / Code / Bibtex

We conduct the first comprehensive empirical study that quantifies the effects of quantization on various deep RL tasks and algorithms. We deploy a quantized RL-based robot navigation policy onto an embedded system, achieving 18x speedup and 4x reduction in memory usage.

Honors and Awards
  • 2022 1st place, ACM Studemt Research Competition at Embedded Systems Week (ESWEEK)
  • 2022 3rd Place, ACM Student Research Competition at International Conference On Computer-Aided Design (ICCAD) (declined)
  • 2022 Qualcomm Fellowship
  • 2022 Young Fellow, IEEE/ACM Design Automation Conference (DAC)
  • 2022 CRNCH PhD Fellowship, Center for Research into Novel Computing Hierarchies, Georgia Tech
  • 2021 Young Fellow, IEEE/ACM Design Automation Conference (DAC)
  • 2021 Best Research Video Award, Young Fellow Program at IEEE/ACM Design Automation Conference (DAC)
  • 2021 4th Place, ACM Student Research Competition at International Conference On Computer-Aided Design (ICCAD)
  • 2020 Best Paper Award, IEEE/ACM Design Automation Conference (DAC)
  • 2020 Best Paper Award, IEEE Computer Architecture Letters (CAL)
  • 2018 Chiang Chen Overseas Graduate Scholarship (10 of all undergraduates and graduates in China)
  • 2018 Best Undergraduate Thesis Award
  • 2018 Frist Place, Chunhui Innovation Achievement Award (Highest Student Academic Honor of HIT)
  • 2018 Top Ten Outstanding Undergraduates of HIT
  • 2018 China Telecom Scholarship
  • 2017 Innovation and Entrepreneurship Award, Ministry of Industry and Information, China
  • 2016 First Place, National Mathematical Contest in Modeling, China
  • 2016 Siemens Acedemic Scholarship
  • 2015 Johnson Electric Acedemic Scholarship
  • Talks

    • Efficient Algorithm-Hardware Co-Design for Autonomous Machine Computing
    • - ACM Student Research Competition at ICCAD, San Diego, CA, Nov. 2022
      - 5th IBM AI Compute Symposium, IBM T.J. Watson Research Center, Yorktown Heights, NY, Oct. 2022
      - CBRIC (Center for Brain-Inspired Computing) Annual Summit, Purdue University, IN, Oct. 2022
      - Guest Lecture, Georgia Tech ECE8893 Parallel Programming for FPGAs (Host: Prof. Callie Hao), Atlanta, GA, Mar. 2022
      - CRNCH (Center for Research into Novel Computing Hierarchies) Annual Summit, Online, Feb. 2022
    • Enabling Reliable and Safe Autonomous Systems
    • - ACM Student Research Competition at ESWEEK, Online, Nov. 2022
      - COMPSAC plenary panel 'Reliability of Autonomous Machines', Online, Jun. 2022
      - CBRIC (Center for Brain-Inspired Computing) Annual Summit, Online, Oct. 2021
      - CBRIC (Center for Brain-Inspired Computing) Industry Talk, Online, Aug. 2021
      - Harvard VLSI-Arch Lab, Online, Jul. 2020
    • Edge Computing on Aerial Robots
    • - ACM Student Research Competition at ICCAD, Online, Nov. 2021
      - Georgia Tech Integrated Circuits and System Research Lab, Online, Sept. 2020
    Misc

    • Sports: I like table tennis, soccer, and swimming. I'm a member of Georgia Tech Table Tennis Association (GTTTA).
    • Arts: I like calligraphy and have practiced more than 10 years. My undergrad Calculus class notes was awarded 'The Most Beautiful Class Note' and permanently collected and displayed by university museum.

    Last Update: Nov. 2022

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