Zishen Wan  

I am a 3rd-year Ph.D. student at Georgia Tech, advised by Prof. Arijit Raychowdhury at Integrated Circuits and Systems Research Lab. I have general research interests in computer architecture and VLSI, with a focus on designing efficient and reliable hardware and systems for autonomous machines and edge intelligence.

Before coming to Georgia Tech, I received my M.S. in Electrical Engineering from Harvard University in 2020. During my master, I was fortunate to be advised by Prof. Vijay Janapa Reddi at Edge Computing Lab, and collaborated with Prof. David Brooks and Prof. Gu-Yeon Wei at VLSI-Arch Lab.

I received my B.Eng. in Electrical Engineering from Harbin Institute of Technology in 2018. During my undergrad, I was fortunate to work with Prof. Dianguo Xu and Prof. Xueguang Zhang.

I was a cross-registered student at MIT from 2018 to 2020, and a visiting student at National Chiao-Tung University and National Tsing-Hua University in 2017.

Google Scholar  /  CV  /  LinkedIn  /  GitHub  /  Twitter

• To advance performance and efficiency of autonomous intelligent systems:
[Book] [DATE'23a] [ISSCC'23] [CICC'22] [AICAS'22] [ASP-DAC'22] [TMLR'22] [CAS Magazine'21] [AICAS'21a] [AICAS'21b] [ICLR-W'21] [MLSys-W'20]
• To advance resilience and robustness of autonomous intelligent systems:
[DAC'23] [DATE'23b] [ICCAD'22] [DATE'22] [DAC'22] [DAC'21] [DAC'20] [ICML-W'22] [NVM-W'22]
• To benchmark and automate the design flow of autonomous intelligent systems:
[IEEE Micro Top Picks'23] [MICRO'22] [ISPASS'22] [AutoSoC] [CAL'20]

This book provides a thorough overview of the state-of-the-art FPGA-based robotic computing accelerator designs and summarizes their adopted optimized techniques. This book consists of ten chapters, delving into the details of how FPGAs have been utilized in robotic perception, localization, planning, and multi-robot collaboration tasks. In addition to individual robotic tasks, this book provides detailed descriptions of how FPGAs have been used in robotic products, including commercial autonomous vehicles and space exploration robots. Some key observations of this book has been published as a survey paper in IEEE Circuits and Systems Magazine, 2021.

We propose BEERY, a robust learning framework to improve bit error robustness and energy efficiency for RL autonomous systems. BEERY enables robust low-voltage operation on UAVs, leading to high energy savings in both compute-level operation and system-level quality-of-flight.

We propose a lightweight, fully unsupervised and real-time adaptation algorithm for safety-critical lane detection of autonomous driving, and demonstrate its state-of-the-art performance on Nvidia Jetson Orin.

We build a ROS-based end-to-end fault analysis framework to understand the resilience of Micro Aerial Vehicles (MAVs) system, and propose two low overhead anomaly-based transient fault detection and recovery schemes.

We propose a fully-programmable heterogeneous ARM Cortex-based SoC with an in-memory low-power RRAM-based CNN and a near-memory high-speed SRAM-based SNN in a hybrid architecture, for high-speed target identification and tracking applications.

We explore the various originations of fault sources across the computing stack of autonomous systems, and discuss the diverse fault impacts and fault mitigation techniques of different scales of autonomous systems.

We propose a machine learning-based design space exploration framework, Autopilot, that can automate the full system cyber-physical co-design for aerial robots. AutoPilot consistently outperforms general-purpose processors and specialized accelerators built for drones.

We propose a new ECC scheme for hard and soft errors in foundry RRAM-based Compute-In-Memory chip. We demonstrate single, double, and triple error correction offering up to 16,000× reduction in bit error rate, while consuming only 29.1% area and 26.3% power overhead.

We present the cross-layer robotic computing stack, illustrate the current progress and key design techniques. We summarize and highlight the challenges, research opportunities, and roadmap for the next-generation FPGA-based robotic computing systems.

We present an energy-efficient and runtime-reconfigurable FPGA-based accelerator for robotic localization tasks. We exploit SLAM-specific data locality, sparsity, reuse, and parallelism, and achieve >5x performance improvement over state-of-the-art.

We present a bottleneck analysis tool, Skyline, for designing compute systems for autonomous Unmanned Aerial Vehicles (UAV). The tool provides insights by exploiting the fundamental relationships between various components in the autonomous UAV such as sensor, compute, body dynamics.

We characterize the hardware transient fault impact on federated reinforcement learning system, a swarm intelligence paradigm in autonomous machines. We further propose application-aware cost-effective fault detection and mitigation scheme to enable autonomy reliability.

We present a series of ultra-low-power accelerator and system designs on enabling the intelligence in edge robotic platforms, with an emphasis on mixed-signal circuit, neuro-inspired computing, benchmarking, software infrastructure, and algorithm-hardware co-design.

We propose a quantized distributed reinforcement learning (RL) training system, and enable more environmentally friendly RL by achieving carbon emission improvements between 1.9 × and 3.76× compared to training RL-agents in full-precision.

We evaluate the resilience of learning-based navigation systems to transient and permanent hardware faults. We further propose two efficient fault mitigation techniques for both RL training and inference.

We present AutoSoC, a algorithms-hardware co-design framework for end-to-end learning-based aerial autonomous machines. AutoSoC runs the ASIC flow of place and route and generates layouts of the floor-planed accelerators with varying performance, area, and power consumption.

We provide an overview of recent work on FPGA-based robotic accelerators. An analysis of software and hardware optimization techniques and main technical issues is presented, along with some commercial and space applications.

We present a real-time and energy-efficient ORB (Oriented-Fast and Rotated-BRIEF) based visual system on FPGAs. Compared to Nvidia TX1 and Intel i7 CPU, our FPGA-based implementation achieves 5.6x and 3.4x speedup, as well as 3.0x and 34.6x power reduction, respectively.

We present an energy-efficient hardware architecture for real-time ELAS (Efficient Large-scale Stereo) based stereo matching on FPGAs. Compared to SOTA SoC and Intel i7 CPU, our FPGA design achieves 3.32x and 38.4x speedup, and 1.13x and 27.1x power reduction, respectively.

We present an algorithm-hardware co-design centered around a novel floating-point inspired number format, which can achieve higher inference accuracies and lower per-operation energy compared to NVDLA-like PE.

We introduce a roofline-like model to understand the role of computing in aerial autonomous machines. The model provides insights by exploiting the fundamental relationships between various components in an aerial robot, such as sensor framerate, compute performance, and body dynamics.

We analyze the multi-task federated reinforcement learning (MT-FedRL) algorithm with an adversarial perspective. We propose an effective adversarial attack method, and an adaptative detection and recovery scheme for MT-FedRL system.

We explore the impact of device variation (calibrated with measured data on foundry RRAM arrays) and propose a new class of ECC for hard and soft errors in RRAM-based in-memory coomputing. We demonstrate the single, double, and triple error correction.

We introduce a novel Reinforcement Learning training paradigm, ActorQ, to speed up actor-learner distributed RL training. ActorQ demonstrates >1.5x-2.5× speedup, and faster convergence over full precision training on a range of tasks (Deepmind Control Suite) and RL algorithms (D4PG, DQN).

We conduct the first comprehensive empirical study that quantifies the effects of quantization on various deep RL tasks and algorithms. We deploy a quantized RL-based robot navigation policy onto an embedded system, achieving 18x speedup and 4x reduction in memory usage.

• Intelligence in Robotic Computing: Exploring Agile Design Flows for Efficient and Resilient Autonomous Systems
- Georgia Tech EIC Lab (Host: Prof. Celine Lin), Atlanta, GA, Mar. 2023
- CRNCH (Center for Research into Novel Computing Hierarchies) Annual Summit, Atlanta, GA, Feb. 2023
- CRIDC (Career, Research, and Innovation Development Conference), Atlanta, GA, Feb. 2023
- ACM Student Research Competition at ICCAD, San Diego, CA, Nov. 2022

• Efficient Algorithm-Hardware Co-Design for Autonomous Machine Computing
- 5th IBM AI Compute Symposium, IBM T.J. Watson Research Center, Yorktown Heights, NY, Oct. 2022
- CBRIC (Research Center for Brain-Inspired Computing) Annual Summit, DARPA JUMP SRC, Purdue University, IN, Oct. 2022
- Guest Lecture, Georgia Tech ECE8893 Parallel Programming for FPGAs (Host: Prof. Callie Hao), Atlanta, GA, Mar. 2022
- CRNCH (Center for Research into Novel Computing Hierarchies) Annual Summit, Online, Feb. 2022
• Enabling Reliable and Safe Autonomous Systems
- ACM Student Research Competition at ESWEEK, Online, Nov. 2022
- COMPSAC plenary panel 'Reliability of Autonomous Machines', Online, Jun. 2022
- CBRIC (Center for Brain-Inspired Computing) Annual Summit, DARPA JUMP SRC, Online, Oct. 2021
- CBRIC (Center for Brain-Inspired Computing) Industry Talk, DARPA JUMP SRC, Online, Aug. 2021
- Harvard Architecture, Circuits and Compilers Lab, Online, Jul. 2020
• Edge Computing on Aerial Robots
- ACM Student Research Competition at ICCAD, Online, Nov. 2021
- Georgia Tech Integrated Circuits and System Research Lab, Online, Sept. 2020

• Technical Program Committee: DAC'23, IJCAI'23, NPC'22.
• Journal Reviewer: T-CAD.
• Artifact Evaluation Committee: ASPLOS'23, MICRO'22, ASPLOS'22, IISWC'22.
• Working Group: Co-found MLCommons (MLPerf) Resilience and Robustness Research Working Group.
• Panelist: COMPSAC'22.
• Outreach activity: Steering Committee of IEEE Entrepreneurship China.

• Sports: I like table tennis, soccer, and swimming. I'm a member of Georgia Tech Table Tennis Association (GTTTA).
• Arts: I like calligraphy and have practiced more than 10 years. My undergrad Calculus class notes was awarded 'The Most Beautiful Class Note' and permanently collected and displayed by university museum.

Last Update: Mar. 2023

Website Template